Course Content
Basics of system hardware design. Hierarchical design using top-down and bottom-up methodology. System partitioning techniques, interfacing between system components. Handling multiple clock domains, Synchronous and asynchronous design styles. Interface between synchronous and asynchronous blocks. Meta-stability and techniques for handling it. Interfacing linear and digital systems, data conversion circuits. Design of finite state machines, state assignment strategies. Design and optimization of pipelined stages. Use of data flow graphs, Critical path analysis, retiming and scheduling strategies for performance enhancement. Implementation of DSP algorithms. Signal integrity and high speed behaviour of interconnects: ringing, cross talk and ground bounce. Layout strategies at IC and board level for local and global signals. Power supply decoupling. Test strategies: Border Scan, Built In Self Test and signature analysis.
Text / References
- 1 Jan M. Rabaey, "Digital Integrated Circuits", Prentice Hall of India, (New Delhi), 1997.
- 2 M.J.S. Smith, "Application Specific Integrated Circuits", Addison Wesley (Reading, MA), 19993. Vijay K. Madisetti, "VLSI Digital Signal Processing", IEEE Press (NY, USA), 1995.