
Contact
Email:
rahuls@ee.iitb.ac.in
Address:
Office 137A,1st Floor, EE Main Bldg., Department of Electrical Engineering, IIT Bombay, Powai, Mumbai 400076, India
Research Interests
Analog/RF/millimeter-wave integrated circuits, systems, and architectures IC design for emerging communication technologies Digital/mixed-signal calibration techniques for RF transceivers
Qualifications
- • Ph.D., Electrical and Computer Engineering, Carnegie Mellon University, USA (2018)
- • M.Sc., Electrical Engineering, Seoul National University, South Korea (2011)
- • B.Tech., Electronics Engineering, Indian Institute of Technology (BHU), Varanasi (2008)
Work Experience
- • Staff RFIC Engineer, RF/Analog Group, Qualcomm, San Diego, USA (2018-2023)
- • Engineer, SOC Processor Development, Samsung Electronics, South Korea (2011-2013)
Publications
Papers ▼
- R. Singh , S. Mondal and J. Paramesh, “A Millimeter-wave Receiver Using a Wideband Low-Noise Amplifier with One-Port Coupled Resonator Loads,” IEEE Transactions on Microwave Theory and Techniques , vol. 68, no. 9, pp. 3794–3803, Sept. 2020.
- R. Singh , S. Mondal and J. Paramesh, “A Compact Digitally-Assisted Merged LNA Vector Modulator Using Coupled Resonators for Integrated Beamforming Transceivers,” IEEE Transactions on Microwave Theory and Techniques , vol. 67, no. 7, pp. 2555–2568, Jul. 2019.
- S. Mondal, R. Singh , A. I. Hussein, and J. Paramesh, “A 25–30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication,” IEEE Journal of Solid-State Circuits , vol. 53, pp. 1275–1287, May 2018.
- S. Mondal, R. Singh , and J. Paramesh, “A Reconfigurable 28/37 GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation,” Proceedings of the International Solid-State Circuits Conference (ISSCC) , pp. 72–74, Feb. 2018.
- R. Singh and J. Paramesh, “A Digitally-Tuned Triple-Band Transformer Power Combiner for CMOS Power Amplifiers,” Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC) , pp. 332–335, June 2017.
- R. Singh , G.-M. Hong, and S. Kim, “Bitline Techniques with Dual Dynamic Nodes for Low-Power Register Files,” IEEE Transactions on Circuits and Systems-I , vol. 60, no. 4, pp. 965–974, April 2013.
- R. Singh , J.-K. Woo, H. Lee, S. Y. Kim, and S. Kim, “Power-Gating Noise Minimization by Three-Step Wake-up Partitioning,” IEEE Transactions on Circuits and Systems-I , vol. 59, no. 4, pp. 749–762, April 2012.
- R. Singh , S. Mondal and J. Paramesh, “A Millimeter-wave Receiver Using a Wideband Low-Noise Amplifier with One-Port Coupled Resonator Loads,” IEEE Transactions on Microwave Theory and Techniques , vol. 68, no. 9, pp. 3794–3803, Sept. 2020.
- R. Singh , S. Mondal and J. Paramesh, “A Compact Digitally-Assisted Merged LNA Vector Modulator Using Coupled Resonators for Integrated Beamforming Transceivers,” IEEE Transactions on Microwave Theory and Techniques , vol. 67, no. 7, pp. 2555–2568, Jul. 2019.
- S. Mondal, R. Singh , A. I. Hussein, and J. Paramesh, “A 25–30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication,” IEEE Journal of Solid-State Circuits , vol. 53, pp. 1275–1287, May 2018.
- S. Mondal, R. Singh , and J. Paramesh, “A Reconfigurable 28/37 GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation,” Proceedings of the International Solid-State Circuits Conference (ISSCC) , pp. 72–74, Feb. 2018.
- R. Singh and J. Paramesh, “A Digitally-Tuned Triple-Band Transformer Power Combiner for CMOS Power Amplifiers,” Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC) , pp. 332–335, June 2017.
- R. Singh , G.-M. Hong, and S. Kim, “Bitline Techniques with Dual Dynamic Nodes for Low-Power Register Files,” IEEE Transactions on Circuits and Systems-I , vol. 60, no. 4, pp. 965–974, April 2013.
- R. Singh , J.-K. Woo, H. Lee, S. Y. Kim, and S. Kim, “Power-Gating Noise Minimization by Three-Step Wake-up Partitioning,” IEEE Transactions on Circuits and Systems-I , vol. 59, no. 4, pp. 749–762, April 2012.
Research Interests
Analog/RF/millimeter-wave integrated circuits, systems, and architectures IC design for emerging communication technologies Digital/mixed-signal calibration techniques for RF transceivers
Qualifications
- • Ph.D., Electrical and Computer Engineering, Carnegie Mellon University, USA (2018)
- • M.Sc., Electrical Engineering, Seoul National University, South Korea (2011)
- • B.Tech., Electronics Engineering, Indian Institute of Technology (BHU), Varanasi (2008)
Work Experience
- • Staff RFIC Engineer, RF/Analog Group, Qualcomm, San Diego, USA (2018-2023)
- • Engineer, SOC Processor Development, Samsung Electronics, South Korea (2011-2013)
Publications
Papers ▼
- R. Singh , S. Mondal and J. Paramesh, “A Millimeter-wave Receiver Using a Wideband Low-Noise Amplifier with One-Port Coupled Resonator Loads,” IEEE Transactions on Microwave Theory and Techniques , vol. 68, no. 9, pp. 3794–3803, Sept. 2020.
- R. Singh , S. Mondal and J. Paramesh, “A Compact Digitally-Assisted Merged LNA Vector Modulator Using Coupled Resonators for Integrated Beamforming Transceivers,” IEEE Transactions on Microwave Theory and Techniques , vol. 67, no. 7, pp. 2555–2568, Jul. 2019.
- S. Mondal, R. Singh , A. I. Hussein, and J. Paramesh, “A 25–30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication,” IEEE Journal of Solid-State Circuits , vol. 53, pp. 1275–1287, May 2018.
- S. Mondal, R. Singh , and J. Paramesh, “A Reconfigurable 28/37 GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation,” Proceedings of the International Solid-State Circuits Conference (ISSCC) , pp. 72–74, Feb. 2018.
- R. Singh and J. Paramesh, “A Digitally-Tuned Triple-Band Transformer Power Combiner for CMOS Power Amplifiers,” Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC) , pp. 332–335, June 2017.
- R. Singh , G.-M. Hong, and S. Kim, “Bitline Techniques with Dual Dynamic Nodes for Low-Power Register Files,” IEEE Transactions on Circuits and Systems-I , vol. 60, no. 4, pp. 965–974, April 2013.
- R. Singh , J.-K. Woo, H. Lee, S. Y. Kim, and S. Kim, “Power-Gating Noise Minimization by Three-Step Wake-up Partitioning,” IEEE Transactions on Circuits and Systems-I , vol. 59, no. 4, pp. 749–762, April 2012.
- R. Singh , S. Mondal and J. Paramesh, “A Millimeter-wave Receiver Using a Wideband Low-Noise Amplifier with One-Port Coupled Resonator Loads,” IEEE Transactions on Microwave Theory and Techniques , vol. 68, no. 9, pp. 3794–3803, Sept. 2020.
- R. Singh , S. Mondal and J. Paramesh, “A Compact Digitally-Assisted Merged LNA Vector Modulator Using Coupled Resonators for Integrated Beamforming Transceivers,” IEEE Transactions on Microwave Theory and Techniques , vol. 67, no. 7, pp. 2555–2568, Jul. 2019.
- S. Mondal, R. Singh , A. I. Hussein, and J. Paramesh, “A 25–30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication,” IEEE Journal of Solid-State Circuits , vol. 53, pp. 1275–1287, May 2018.
- S. Mondal, R. Singh , and J. Paramesh, “A Reconfigurable 28/37 GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation,” Proceedings of the International Solid-State Circuits Conference (ISSCC) , pp. 72–74, Feb. 2018.
- R. Singh and J. Paramesh, “A Digitally-Tuned Triple-Band Transformer Power Combiner for CMOS Power Amplifiers,” Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC) , pp. 332–335, June 2017.
- R. Singh , G.-M. Hong, and S. Kim, “Bitline Techniques with Dual Dynamic Nodes for Low-Power Register Files,” IEEE Transactions on Circuits and Systems-I , vol. 60, no. 4, pp. 965–974, April 2013.
- R. Singh , J.-K. Woo, H. Lee, S. Y. Kim, and S. Kim, “Power-Gating Noise Minimization by Three-Step Wake-up Partitioning,” IEEE Transactions on Circuits and Systems-I , vol. 59, no. 4, pp. 749–762, April 2012.

Contact
rahuls@ee.iitb.ac.in
Address
Office 137A,1st Floor, EE Main Bldg., Department of Electrical Engineering, IIT Bombay, Powai, Mumbai 400076, India