Contact
Email:
viren@ee.iitb.ac.in
Office:
+91-22-2576-9432
Address:
Department of Electrical Engineering IIT Bombay, Powai Mumbai 400 076, India
Research Interests
Computer Architecture Processor Architecture & micro architecture VLSI Testing Fault-tolerant computing Robust Design and architecture Self-healing system design SoC/NoC design and test Post Silicon Debug High level synthesis Formal verification
Qualifications
- • Ph.D (Computer Science) – (2002-2005) Nara Institute of Science and Technology (NAIST) Kansai Science City, Nara, Japan Advisor: Prof. Hideo Fujiwara Co-Advisors: Prof. Kewal K. Saluja (Univ. of Wisconsin-Madison, USA) and Prof. Michiko Inoue (NAIST)
Work Experience
- • Faculty member, Indian Institute of Technology Bombay (Since Dec 2011) Faculty member, SERC, Indian Institute of Science (IISc), Bangalore (May 2007 – Dec 2011) Scientist, Central Electronics Engg. Research Institute (CEERI), Pilani (Mar 1997 – May 20)
Research Interests
Computer Architecture Processor Architecture & micro architecture VLSI Testing Fault-tolerant computing Robust Design and architecture Self-healing system design SoC/NoC design and test Post Silicon Debug High level synthesis Formal verification
Qualifications
- • Ph.D (Computer Science) – (2002-2005) Nara Institute of Science and Technology (NAIST) Kansai Science City, Nara, Japan Advisor: Prof. Hideo Fujiwara Co-Advisors: Prof. Kewal K. Saluja (Univ. of Wisconsin-Madison, USA) and Prof. Michiko Inoue (NAIST)
Work Experience
- • Faculty member, Indian Institute of Technology Bombay (Since Dec 2011) Faculty member, SERC, Indian Institute of Science (IISc), Bangalore (May 2007 – Dec 2011) Scientist, Central Electronics Engg. Research Institute (CEERI), Pilani (Mar 1997 – May 20)
Contact
viren@ee.iitb.ac.in
Office Phone
+91-22-2576-9432
Address
Department of Electrical Engineering IIT Bombay, Powai Mumbai 400 076, India